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soc/cores/spi_flash: fix Dual mode compilation.

This commit is contained in:
Florent Kermarrec 2020-10-07 19:28:13 +02:00
parent a2b71fde4a
commit 375b6f2dc7
1 changed files with 4 additions and 3 deletions
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7
litex/soc/cores/spi_flash.py
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@ -129,11 +129,12 @@ class SpiFlashDualQuad(SpiFlashCommon, AutoCSR):
addr_width = 24
dq = TSTriple(spi_width)
# Keep DQ2,DQ3 as outputs during bitbang, this ensures they activate ~WP or ~HOLD functions
self.specials.dq0 = Tristate(pads.dq[0], o=dq.o[0], i=dq.i[0], oe=dq.oe)
self.specials.dq1 = Tristate(pads.dq[1], o=dq.o[1], i=dq.i[1], oe=dq.oe)
self.specials.dq2 = Tristate(pads.dq[2], o=dq.o[2], i=dq.i[2], oe=(dq.oe | self.bitbang_en.storage))
self.specials.dq3 = Tristate(pads.dq[3], o=dq.o[3], i=dq.i[3], oe=(dq.oe | self.bitbang_en.storage))
if spi_width > 2:
# Keep DQ2,DQ3 as outputs during bitbang, this ensures they activate ~WP or ~HOLD functions
self.specials.dq2 = Tristate(pads.dq[2], o=dq.o[2], i=dq.i[2], oe=(dq.oe | self.bitbang_en.storage))
self.specials.dq3 = Tristate(pads.dq[3], o=dq.o[3], i=dq.i[3], oe=(dq.oe | self.bitbang_en.storage))
sr = Signal(max(cmd_width, addr_width, wbone_width))
if endianness == "big":