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Merge pull request #1447 from enjoy-digital/naxriscv-merge 

cpu/naxriscv reduce memory latency on peripheral accesses
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Dolu1990 2022-09-30 16:21:23 +02:00 committed by GitHub
parent 43699f2768 c9f669d4ec
commit 3836e8a36c
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1 changed files with 2 additions and 2 deletions
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litex/soc/cores/cpu/naxriscv/core.py
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@ -236,8 +236,8 @@ class NaxRiscv(CPU):
sdir = os.path.join(vdir, "ext", "SpinalHDL")
if NaxRiscv.update_repo != "no":
NaxRiscv.git_setup("NaxRiscv", ndir, "https://github.com/SpinalHDL/NaxRiscv.git" , "main", "15d2d10b" if NaxRiscv.update_repo=="recommended" else None)
NaxRiscv.git_setup("SpinalHDL", sdir, "https://github.com/SpinalHDL/SpinalHDL.git", "dev" , "5a0592d1" if NaxRiscv.update_repo=="recommended" else None)
NaxRiscv.git_setup("NaxRiscv", ndir, "https://github.com/SpinalHDL/NaxRiscv.git" , "main", "518d2713" if NaxRiscv.update_repo=="recommended" else None)
NaxRiscv.git_setup("SpinalHDL", sdir, "https://github.com/SpinalHDL/SpinalHDL.git", "dev" , "56400992" if NaxRiscv.update_repo=="recommended" else None)
gen_args = []
gen_args.append(f"--netlist-name={NaxRiscv.netlist_name}")