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software/liblitedram: fix issues with command/write delays not being incremented.

This commit is contained in:
Jędrzej Boczar 2020-11-17 16:25:17 +01:00 committed by Florent Kermarrec
parent 05f83ca978
commit 3bd5d6cc0e
1 changed files with 13 additions and 2 deletions
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15
litex/soc/software/liblitedram/sdram.c
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@ -289,6 +289,7 @@ void sdram_write_leveling_force_cmd_delay(int taps, int show) {
if (show) if (show)
printf("Forcing Cmd delay to %d taps\n", taps); printf("Forcing Cmd delay to %d taps\n", taps);
ddrphy_cdly_rst_write(1); ddrphy_cdly_rst_write(1);
cdelay(100);
for (i=0; i<taps; i++) { for (i=0; i<taps; i++) {
ddrphy_cdly_inc_write(1); ddrphy_cdly_inc_write(1);
cdelay(100); cdelay(100);
@ -330,6 +331,7 @@ static void sdram_write_leveling_rst_delay(int module) {
/* rst delay */ /* rst delay */
ddrphy_wdly_dq_rst_write(1); ddrphy_wdly_dq_rst_write(1);
ddrphy_wdly_dqs_rst_write(1); ddrphy_wdly_dqs_rst_write(1);
cdelay(100);
#ifdef SDRAM_PHY_WRITE_LEVELING_REINIT #ifdef SDRAM_PHY_WRITE_LEVELING_REINIT
for(i=0; i<ddrphy_half_sys8x_taps_read(); i++) { for(i=0; i<ddrphy_half_sys8x_taps_read(); i++) {
ddrphy_wdly_dqs_inc_write(1); ddrphy_wdly_dqs_inc_write(1);
@ -372,12 +374,14 @@ static int sdram_write_leveling_scan(int *delays, int loops, int show)
err_ddrphy_wdly = SDRAM_PHY_DELAYS - ddrphy_half_sys8x_taps_read(); err_ddrphy_wdly = SDRAM_PHY_DELAYS - ddrphy_half_sys8x_taps_read();
sdram_write_leveling_on(); sdram_write_leveling_on();
cdelay(100);
for(i=0;i<SDRAM_PHY_MODULES;i++) { for(i=0;i<SDRAM_PHY_MODULES;i++) {
if (show) if (show)
printf(" m%d: |", i); printf(" m%d: |", i);
/* rst delay */ /* rst delay */
sdram_write_leveling_rst_delay(i); sdram_write_leveling_rst_delay(i);
cdelay(100);
/* scan write delay taps */ /* scan write delay taps */
for(j=0;j<err_ddrphy_wdly;j++) { for(j=0;j<err_ddrphy_wdly;j++) {
@ -435,21 +439,26 @@ static int sdram_write_leveling_scan(int *delays, int loops, int show)
/* rst delay */ /* rst delay */
sdram_write_leveling_rst_delay(i); sdram_write_leveling_rst_delay(i);
cdelay(100);
/* use forced delay if configured */ /* use forced delay if configured */
if (_sdram_write_leveling_dat_delays[i] >= 0) { if (_sdram_write_leveling_dat_delays[i] >= 0) {
delays[i] = _sdram_write_leveling_dat_delays[i]; delays[i] = _sdram_write_leveling_dat_delays[i];
/* configure write delay */ /* configure write delay */
for(j=0; j<delays[i]; j++) for(j=0; j<delays[i]; j++) {
sdram_write_leveling_inc_delay(i); sdram_write_leveling_inc_delay(i);
cdelay(100);
}
/* succeed only if the start of a 1s window has been found */ /* succeed only if the start of a 1s window has been found */
} else if (one_window_best_count > 0 && one_window_best_start > 0) { } else if (one_window_best_count > 0 && one_window_best_start > 0) {
delays[i] = one_window_best_start; delays[i] = one_window_best_start;
/* configure write delay */ /* configure write delay */
for(j=0; j<delays[i]; j++) for(j=0; j<delays[i]; j++) {
sdram_write_leveling_inc_delay(i); sdram_write_leveling_inc_delay(i);
cdelay(100);
}
} }
if (show) { if (show) {
if (delays[i] == -1) if (delays[i] == -1)
@ -479,6 +488,7 @@ static void sdram_write_leveling_find_cmd_delay(unsigned int *best_error, int *b
/* scan through the range */ /* scan through the range */
ddrphy_cdly_rst_write(1); ddrphy_cdly_rst_write(1);
cdelay(100);
for (cdly = cdly_start; cdly < cdly_stop; cdly += cdly_step) { for (cdly = cdly_start; cdly < cdly_stop; cdly += cdly_step) {
/* increment cdly to current value */ /* increment cdly to current value */
while (cdly_actual < cdly) { while (cdly_actual < cdly) {
@ -561,6 +571,7 @@ int sdram_write_leveling(void)
/* set working or forced delay */ /* set working or forced delay */
if (best_cdly >= 0) { if (best_cdly >= 0) {
ddrphy_cdly_rst_write(1); ddrphy_cdly_rst_write(1);
cdelay(100);
for (int i = 0; i < best_cdly; ++i) { for (int i = 0; i < best_cdly; ++i) {
ddrphy_cdly_inc_write(1); ddrphy_cdly_inc_write(1);
cdelay(100); cdelay(100);