soc: Add init_rom to initialize ROM and contents and with auto_size option (enable by default) to reduce ROM size to length of contents when in Read Only mode.

This ensures the integrated ROM is reduced to minimal size before build and avoid having to adjust it manually with --integrated-rom-size on targets.

litex/soc/integration/soc.py

@@ -822,6 +822,18 @@ class SoC(Module):
     def add_rom(self, name, origin, size, contents=[], mode="r"):
         self.add_ram(name, origin, size, contents, mode=mode)
 
+    def init_rom(self, name, contents=[], auto_size=True):
+        self.logger.info("Initializing ROM {} with contents (Size: {}).".format(
+            colorer(name),
+            colorer(f"0x{4*len(contents):x}")))
+        getattr(self, name).mem.init = contents
+        if auto_size and self.bus.regions[name].mode == "r":
+            self.logger.info("Auto-Resizing ROM {} from {} to {}.".format(
+                colorer(name),
+                colorer(f"0x{self.bus.regions[name].size:x}"),
+                colorer(f"0x{4*len(contents):x}")))
+            getattr(self, name).mem.depth = len(contents)
+
     def add_csr_bridge(self, origin, register=False):
         csr_bridge_cls = {
             "wishbone": wishbone.Wishbone2CSR,

litex/soc/integration/soc_core.py

@@ -199,7 +199,7 @@ class SoCCore(LiteXSoC):
         self.csr.add(csr_name, csr_id, use_loc_if_exists=use_loc_if_exists)
 
     def initialize_rom(self, data):
-        self.rom.mem.init = data
+        self.init_rom(name="rom", contents=data)
 
     def add_wb_master(self, wbm):
         self.bus.add_master(master=wbm)
@@ -270,7 +270,7 @@ def soc_core_args(parser):
     parser.add_argument("--no-ctrl", action="store_true", help="Disable Controller (default=False).")
 
     # ROM parameters
-    parser.add_argument("--integrated-rom-size", default=0x8000,  type=auto_int, help="Size/Enable the integrated (BIOS) ROM (default=32KB).")
+    parser.add_argument("--integrated-rom-size", default=0x10000, type=auto_int, help="Size/Enable the integrated (BIOS) ROM (default=64KB, automatically resized to BIOS size when smaller).")
     parser.add_argument("--integrated-rom-file", default=None,    type=str,      help="Integrated (BIOS) ROM binary file.")
 
     # SRAM parameters