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SoCCore: use hex for integrated_rom/sram_size

This commit is contained in:
Florent Kermarrec 2020-01-13 20:01:45 +01:00
parent f818755c9c
commit 4050e60834
1 changed files with 2 additions and 2 deletions
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4
litex/soc/integration/soc_core.py
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@ -85,9 +85,9 @@ class SoCCore(Module):
# CPU parameters # CPU parameters
cpu_type="vexriscv", cpu_reset_address=0x00000000, cpu_variant=None, cpu_type="vexriscv", cpu_reset_address=0x00000000, cpu_variant=None,
# ROM parameters # ROM parameters
integrated_rom_size=32768, integrated_rom_init=[], integrated_rom_size=0x8000, integrated_rom_init=[],
# SRAM parameters # SRAM parameters
integrated_sram_size=4096, integrated_sram_init=[], integrated_sram_size=0x1000, integrated_sram_init=[],
# MAIN_RAM parameters # MAIN_RAM parameters
integrated_main_ram_size=0, integrated_main_ram_init=[], integrated_main_ram_size=0, integrated_main_ram_init=[],
# CSR parameters # CSR parameters