Merge pull request #884 from antmicro/jboc/dq-dqs-training
Write DQ-DQS training
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enjoy-digital
GitHub
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447d2648e8
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@ -802,65 +802,111 @@ static int sdram_read_leveling_scan_module(int module, int bitslip, int show)
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return score;
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}
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static void sdram_read_leveling_module(int module)
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typedef void (*delay_callback)(int module);
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static void sdram_leveling_center_module(
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int module, int show_short, int show_long, delay_callback rst_delay, delay_callback inc_delay)
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{
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int i;
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int show;
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int working;
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int delay, delay_min, delay_max;
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int delay, delay_mid, delay_range;
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int delay_min = -1, delay_min_next = -1, delay_max = -1;
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printf("delays: ");
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if (show_long)
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printf("m%d: |", module);
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/* Find smallest working delay */
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delay = 0;
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sdram_read_leveling_rst_delay(module);
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rst_delay(module);
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while(1) {
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working = sdram_write_read_check_test_pattern(module, 42);
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working &= sdram_write_read_check_test_pattern(module, 84);
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if(working)
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show = show_long;
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#if SDRAM_PHY_DELAYS > 32
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show = show && (delay%16 == 0);
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#endif
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if (show)
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printf(working ? "1" : "0");
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if(working && delay_min < 0) {
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delay_min = delay;
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break;
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}
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delay++;
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if(delay >= SDRAM_PHY_DELAYS)
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break;
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sdram_read_leveling_inc_delay(module);
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inc_delay(module);
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}
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delay_min = delay;
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/* Get a bit further into the working zone */
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#if SDRAM_PHY_DELAYS > 32
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for(i=0;i<16;i++) {
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delay += 1;
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sdram_read_leveling_inc_delay(module);
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inc_delay(module);
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}
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#else
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delay++;
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sdram_read_leveling_inc_delay(module);
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inc_delay(module);
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#endif
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/* Find largest working delay */
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while(1) {
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working = sdram_write_read_check_test_pattern(module, 42);
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working &= sdram_write_read_check_test_pattern(module, 84);
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if(!working)
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break;
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show = show_long;
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#if SDRAM_PHY_DELAYS > 32
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show = show && (delay%16 == 0);
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#endif
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if (show)
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printf(working ? "1" : "0");
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if(!working && delay_max < 0) {
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delay_max = delay;
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}
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/* Store next working delay to include wrapping around */
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if (!working) {
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delay_min_next = -1;
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} else if(working && delay_min_next < 0) {
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delay_min_next = delay;
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}
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delay++;
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if(delay >= SDRAM_PHY_DELAYS)
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break;
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sdram_read_leveling_inc_delay(module);
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inc_delay(module);
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}
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if(delay_max < 0) {
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delay_max = delay;
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}
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if (delay_min >= SDRAM_PHY_DELAYS)
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printf("-");
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/* Extend the range if it wraps around */
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if (delay_min_next > 0) {
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delay_min = delay_min_next;
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delay_max += SDRAM_PHY_DELAYS;
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}
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if (show_long)
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printf("| ");
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delay_mid = (delay_min+delay_max)/2 % SDRAM_PHY_DELAYS;
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delay_range = (delay_max-delay_min)/2;
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if (show_short) {
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if (delay_min < 0)
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printf("delays: -");
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else
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printf("%02d+-%02d", (delay_min+delay_max)/2, (delay_max-delay_min)/2);
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printf("delays: %02d+-%02d", delay_mid, delay_range);
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}
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if (show_long)
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printf("\n");
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/* Set delay to the middle */
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sdram_read_leveling_rst_delay(module);
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for(i=0;i<(delay_min+delay_max)/2;i++) {
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sdram_read_leveling_inc_delay(module);
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rst_delay(module);
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cdelay(100);
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for(i = 0; i < delay_mid; i++) {
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inc_delay(module);
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cdelay(100);
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}
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}
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#endif /* CSR_DDRPHY_BASE */
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#endif /* CSR_SDRAM_BASE */
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@ -881,10 +927,12 @@ void sdram_read_leveling(void)
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/* Scan possible read windows */
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best_score = 0;
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best_bitslip = 0;
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sdram_read_leveling_rst_bitslip(module);
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for(bitslip=0; bitslip<SDRAM_PHY_BITSLIPS; bitslip++) {
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/* Compute score */
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score = sdram_read_leveling_scan_module(module, bitslip, 1);
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sdram_read_leveling_module(module);
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sdram_leveling_center_module(module, 1, 0,
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sdram_read_leveling_rst_delay, sdram_read_leveling_inc_delay);
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printf("\n");
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if (score > best_score) {
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best_bitslip = bitslip;
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@ -904,7 +952,8 @@ void sdram_read_leveling(void)
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sdram_read_leveling_inc_bitslip(module);
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/* Re-do leveling on best read window*/
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sdram_read_leveling_module(module);
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sdram_leveling_center_module(module, 1, 0,
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sdram_read_leveling_rst_delay, sdram_read_leveling_inc_delay);
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printf("\n");
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}
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}
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@ -977,6 +1026,79 @@ static void sdram_write_latency_calibration(void) {
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#endif
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/*-----------------------------------------------------------------------*/
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/* Write DQ-DQS training */
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/*-----------------------------------------------------------------------*/
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#ifdef SDRAM_PHY_WRITE_DQ_DQS_TRAINING_CAPABLE
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static void sdram_write_dq_dqs_training_rst_delay(int module) {
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/* Select module */
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ddrphy_dly_sel_write(1 << module);
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/* Reset delay */
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ddrphy_wdly_dq_rst_write(1);
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/* Un-select module */
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ddrphy_dly_sel_write(0);
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}
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static void sdram_write_dq_dqs_training_inc_delay(int module) {
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/* Select module */
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ddrphy_dly_sel_write(1 << module);
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/* Increment delay */
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ddrphy_wdly_dq_inc_write(1);
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/* Un-select module */
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ddrphy_dly_sel_write(0);
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}
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static void sdram_read_leveling_best_bitslip(int module)
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{
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int score;
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int bitslip;
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int best_bitslip = 0;
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int best_score = 0;
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sdram_read_leveling_rst_bitslip(module);
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for(bitslip=0; bitslip<SDRAM_PHY_BITSLIPS; bitslip++) {
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score = sdram_read_leveling_scan_module(module, bitslip, 0);
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sdram_leveling_center_module(module, 0, 0,
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sdram_read_leveling_rst_delay, sdram_read_leveling_inc_delay);
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if (score > best_score) {
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best_bitslip = bitslip;
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best_score = score;
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}
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if (bitslip == SDRAM_PHY_BITSLIPS-1)
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break;
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sdram_read_leveling_inc_bitslip(module);
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}
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/* Select best read window */
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sdram_read_leveling_rst_bitslip(module);
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for (bitslip=0; bitslip<best_bitslip; bitslip++)
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sdram_read_leveling_inc_bitslip(module);
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}
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static void sdram_write_dq_dqs_training(void)
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{
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/* In the first iteration read leveling and DQ-DQS training may not be done optimally */
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const int n_iter = 2;
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int i;
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int show;
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int module;
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for (i = 0; i < n_iter; ++i) {
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show = i == n_iter - 1;
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for(module=0; module<SDRAM_PHY_MODULES; module++) {
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/* Find best bitslip */
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sdram_read_leveling_best_bitslip(module);
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/* Center DQ-DQS window */
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sdram_leveling_center_module(module, show, show,
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sdram_write_dq_dqs_training_rst_delay, sdram_write_dq_dqs_training_inc_delay);
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}
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}
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}
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#endif /* SDRAM_PHY_WRITE_DQ_DQS_TRAINING_CAPABLE */
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/*-----------------------------------------------------------------------*/
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/* Leveling */
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/*-----------------------------------------------------------------------*/
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@ -1004,6 +1126,11 @@ int sdram_leveling(void)
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sdram_write_latency_calibration();
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#endif
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#ifdef SDRAM_PHY_WRITE_DQ_DQS_TRAINING_CAPABLE
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printf("Write DQ-DQS training:\n");
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sdram_write_dq_dqs_training();
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#endif
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#ifdef SDRAM_PHY_READ_LEVELING_CAPABLE
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printf("Read leveling:\n");
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sdram_read_leveling();
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