Hardware
/
litex
mirror of https://github.com/enjoy-digital/litex.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

targets/add_constant: avoid specifying value when value is None (=default).

This commit is contained in:
Florent Kermarrec 2020-03-26 09:45:19 +01:00
parent 73b4347587
commit 4abb3715d9
2 changed files with 3 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
litex/boards/targets/kcu105.py
View File

@ -67,7 +67,8 @@ class BaseSoC(SoCCore):
iodelay_clk_freq = 200e6, iodelay_clk_freq = 200e6,
cmd_latency = 0) cmd_latency = 0)
self.add_csr("ddrphy") self.add_csr("ddrphy")
self.add_constant("USDDRPHY", None) self.add_constant("USDDRPHY")
self.add_constant("USDDRPHY_DEBUG")
self.add_sdram("sdram", self.add_sdram("sdram",
phy = self.ddrphy, phy = self.ddrphy,
module = EDY4016A(sys_clk_freq, "1:4"), module = EDY4016A(sys_clk_freq, "1:4"),

2
litex/boards/targets/versa_ecp5.py
View File

@ -87,7 +87,7 @@ class BaseSoC(SoCCore):
platform.request("ddram"), platform.request("ddram"),
sys_clk_freq=sys_clk_freq) sys_clk_freq=sys_clk_freq)
self.add_csr("ddrphy") self.add_csr("ddrphy")
self.add_constant("ECP5DDRPHY", None) self.add_constant("ECP5DDRPHY")
self.comb += self.crg.stop.eq(self.ddrphy.init.stop) self.comb += self.crg.stop.eq(self.ddrphy.init.stop)
self.add_sdram("sdram", self.add_sdram("sdram",
phy = self.ddrphy, phy = self.ddrphy,