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interconnect/wishbone/Remapper: Fix src_adr/dst_adr signal size.

This commit is contained in:
Florent Kermarrec 2024-02-28 19:10:07 +01:00
parent 722b6da9fb
commit 4ca66bbee6
1 changed files with 2 additions and 2 deletions
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4
litex/soc/interconnect/wishbone.py
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@ -168,8 +168,8 @@ class Remapper(Module):
}[master.addressing] }[master.addressing]
# Apply Address Regions Remapping. # Apply Address Regions Remapping.
for src_region, dst_region in zip(src_regions, dst_regions): for src_region, dst_region in zip(src_regions, dst_regions):
src_adr = Signal.like(master.adr) src_adr = Signal.like(master.adr + adr_shift + 1)
dst_adr = Signal.like(master.adr) dst_adr = Signal.like(master.adr + adr_shift + 1)
active = Signal() active = Signal()
self.comb += [ self.comb += [
src_adr.eq(adr_remap << adr_shift), src_adr.eq(adr_remap << adr_shift),