Hardware
/
litex
mirror of https://github.com/enjoy-digital/litex.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

microwatt: Fix irq variant 

The vhd2v conversion missed some things that are only run when building
the irq variant.

Signed-off-by: Joel Stanley <joel@jms.id.au>
This commit is contained in:
Joel Stanley 2022-10-26 17:27:15 +10:30
parent d45d3532fe
commit 4ccf9f487d
1 changed files with 1 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
litex/soc/cores/cpu/microwatt/core.py
View File

@ -306,8 +306,7 @@ class XICSSlave(Module, AutoCSR):
# Add VHDL sources.
self.add_sources(platform, use_ghdl_yosys_plugin="ghdl" in self.variant)
@staticmethod
def add_sources(platform, use_ghdl_yosys_plugin=False):
def add_sources(self, platform, use_ghdl_yosys_plugin=False):
sources = [
# Common / Types / Helpers
"decode_types.vhdl",
@ -323,8 +322,6 @@ class XICSSlave(Module, AutoCSR):
cdir = os.path.dirname(__file__)
self.ics_vhd2v_converter.add_sources(sdir, *sources)
self.ics_vhd2v_converter.add_source(os.path.join(os.path.dirname(__file__), "xics_wrapper.vhdl"))
self.icp_vhd2v_converter.add_sources(sdir, *sources)
self.icp_vhd2v_converter.add_source(os.path.join(os.path.dirname(__file__), "xics_wrapper.vhdl"))
def do_finalize(self):
self.specials += Instance("xics_icp_wrapper", **self.icp_params)