remove buggy workaround on read
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parent
84fabd28a2
commit
50da5bfbf0
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@ -12,17 +12,16 @@ class Uart2Spi:
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self.port = port
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self.port = port
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self.baudrate = baudrate
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self.baudrate = baudrate
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self.debug = debug
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self.debug = debug
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self.uart = serial.Serial(port, baudrate, timeout=0.01)
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self.uart = serial.Serial(port, baudrate, timeout=0.25)
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def read(self, addr):
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def read(self, addr):
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while True:
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write_b(self.uart, 0x02)
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write_b(self.uart, 0x02)
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write_b(self.uart, (addr>>8)&0xFF)
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write_b(self.uart, (addr>>8)&0xFF)
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write_b(self.uart, (addr&0xFF))
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write_b(self.uart, (addr&0xFF))
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write_b(self.uart, 0x00)
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write_b(self.uart, 0x00)
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read = self.uart.read()
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read = self.uart.read()
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if self.debug:
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if len(read) == 1:
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print("RD @ %04X" %addr)
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break
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return int(read[0])
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return int(read[0])
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def read_n(self, addr, n, endianess = "LE"):
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def read_n(self, addr, n, endianess = "LE"):
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@ -33,7 +32,10 @@ class Uart2Spi:
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r += self.read(addr+i)<<(8*i)
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r += self.read(addr+i)<<(8*i)
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elif endianess == "LE":
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elif endianess == "LE":
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r += self.read(addr+words-1-i)<<(8*i)
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r += self.read(addr+words-1-i)<<(8*i)
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if self.debug:
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print("RD @ %04X" %addr)
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return r
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return r
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def write(self, addr, data):
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def write(self, addr, data):
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write_b(self.uart, 0x01)
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write_b(self.uart, 0x01)
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