[> migScope
------------

This is a small Logic Analyser to be embedded in a Fpga design to debug internal
or external signals.

[> Status:
Early development phase

Simulation:
-tb_spi2Csr      :   Test Spi <--> Csr Bridge : [Ok]
-tb_TriggerCsr   :   Test Trigger with Csr    : [Ok]
-tb_RecorderCsr  :   Test Recorder with Csr   : [Ok]
-tb_MigScope     :   Global Test with Csr     : [Ok]

Example Design:
-de0_nano        :   Generate Signals in FPGA and probe them with migScope : [Wip]
                     Toolchain [Ok]
-de1             :   Generate Signals in FPGA and probe them with migScope : [Wip]
                     Toolchain [Ok]
                     - test_MigIo : Led & Switch Test controlled by Python [Ok]
                     - test_MigLa : Logic Analyzer controlled by Python [Wip]
                                    (Still some glitches in received Data, let's use
                                     migScope to debug itself :))

[> Contact
E-mail: florent@enjoy-digital.fr