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integration/soc/sdcard: cleanup emulator integration, fix sim.
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parent
7602977c16
commit
52f36b1257
3 changed files with 11 additions and 8 deletions
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@ -1244,23 +1244,24 @@ class LiteXSoC(SoC):
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self.add_csr(name)
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# Add SDCard -----------------------------------------------------------------------------------
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def add_sdcard(self, name="sdcard", with_emulator=False):
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def add_sdcard(self, name="sdcard", use_emulator=False):
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# Imports
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from litesdcard.emulator import SDEmulator
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from litesdcard.phy import SDPHY
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from litesdcard.core import SDCore
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from litesdcard.frontend.dma import SDBlock2MemDMA, SDMem2BlockDMA
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# Emulator / Pads
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if with_emulator:
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from litesdcard.emulator import SDEmulator
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self.submodules.sdemulator = SDEmulator(self.platform)
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sdcard_pads = self.sdemulator.pads
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if use_emulator:
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sdemulator = SDEmulator(self.platform)
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self.submodules += sdemulator
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sdcard_pads = sdemulator.pads
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else:
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sdcard_pads = self.platform.request(name)
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# Core
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self.submodules.sdphy = SDPHY(sdcard_pads, self.platform.device, self.clk_freq)
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self.submodules.sdcore = SDCore(self.sdphy)
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self.submodules.sdphy = SDPHY(sdcard_pads, self.platform.device, self.clk_freq)
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self.submodules.sdcore = SDCore(self.sdphy)
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self.add_csr("sdphy")
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self.add_csr("sdcore")
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@ -562,7 +562,9 @@ sdcard_set_block_count(count);
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/* Flush CPU caches */
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flush_cpu_dcache();
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#ifdef CONFIG_L2_SIZE
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flush_l2_cache();
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#endif
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}
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void sdcard_write(uint32_t sector, uint32_t count, uint8_t* buf)
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@ -309,7 +309,7 @@ class SimSoC(SoCCore):
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# SDCard -----------------------------------------------------------------------------------
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if with_sdcard:
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self.add_sdcard("sdcard", with_emulator=True)
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self.add_sdcard("sdcard", use_emulator=True)
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# Build --------------------------------------------------------------------------------------------
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