integration/soc: move pads.rst control to PHY.
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@ -1259,8 +1259,6 @@ class LiteXSoC(SoC):
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sdcard_pads = self.platform.request(name)
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# Core
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if hasattr(sdcard_pads, "rst"):
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self.comb += sdcard_pads.rst.eq(0)
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self.submodules.sdphy = SDPHY(sdcard_pads, self.platform.device, self.clk_freq)
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self.submodules.sdcore = SDCore(self.sdphy)
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self.add_csr("sdphy")
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