litex_json2renode: correct VexRiscv variants

corrrect the VexRiscv variants.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
This commit is contained in:
Fin Maaß 2024-06-11 10:40:06 +02:00
parent 1ee2e3a31d
commit 53ae12ca65
1 changed files with 17 additions and 11 deletions

View File

@ -219,23 +219,29 @@ def get_cpu_count(csr):
vexriscv_common_kind = {
'name': 'VexRiscv',
'variants': {
'linux': {
'properties': ['cpuType: "rv32ima"', 'privilegeArchitecture: PrivilegeArchitecture.Priv1_10'],
'minimal': {
'properties': ['cpuType: "rv32i_zicsr_zifencei"'],
},
'i': {
'properties': ['cpuType: "rv32i"'],
'lite': {
'properties': ['cpuType: "rv32im_zicsr_zifencei"'],
},
'im': {
'properties': ['cpuType: "rv32im"'],
},
'ima': {
'properties': ['cpuType: "rv32ima"'],
'standard': {
'properties': ['cpuType: "rv32im_zicsr_zifencei"'],
},
'imac': {
'properties': ['cpuType: "rv32imac"'],
'properties': ['cpuType: "rv32imac_zicsr_zifencei"'],
},
'full': {
'properties': ['cpuType: "rv32im_zicsr_zifencei"'],
},
'linux': {
'properties': ['cpuType: "rv32ima_zicsr_zifencei"'],
},
'secure': {
'properties': ['cpuType: "rv32ima_zicsr_zifencei"'],
},
'others': {
'properties': ['cpuType: "rv32im"'],
'properties': ['cpuType: "rv32im_zicsr_zifencei"'],
}
},
'supports_time_provider': True,