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cores/clock/xilinx_common: Add BUFH support and lower buf parameter before use to allow user to specify it in upper or lower case.

This commit is contained in:
Florent Kermarrec 2023-06-13 13:23:47 +02:00
parent 3a7aaf5124
commit 57840c63a3
1 changed files with 3 additions and 0 deletions
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3
litex/soc/cores/clock/xilinx_common.py
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@ -53,10 +53,13 @@ class XilinxClocking(Module, AutoCSR):
else: else:
clkout_buf = Signal() clkout_buf = Signal()
self.comb += cd.clk.eq(clkout_buf) self.comb += cd.clk.eq(clkout_buf)
buf = buf.lower()
if buf == "bufg": if buf == "bufg":
self.specials += Instance("BUFG", i_I=clkout, o_O=clkout_buf) self.specials += Instance("BUFG", i_I=clkout, o_O=clkout_buf)
elif buf == "bufr": elif buf == "bufr":
self.specials += Instance("BUFR", i_I=clkout, o_O=clkout_buf) self.specials += Instance("BUFR", i_I=clkout, o_O=clkout_buf)
elif buf == "bufh":
self.specials += Instance("BUFH", i_I=clkout, o_O=clkout_buf)
elif buf == "bufgce": elif buf == "bufgce":
if ce is None: if ce is None:
raise ValueError("BUFGCE requires user to provide a clock enable ce Signal") raise ValueError("BUFGCE requires user to provide a clock enable ce Signal")