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Merge pull request #734 from antmicro/axi4-slave-bridge

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Add get_ios for full AXI and add missing signals in connect_to_pads
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enjoy-digital 2020-12-18 15:25:54 +01:00 committed by GitHub
commit 57d9816065
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1 changed files with 23 additions and 1 deletions
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24
litex/soc/interconnect/axi.py
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@ -140,7 +140,29 @@ class AXIInterface:
self.r = stream.Endpoint(r_description(data_width, id_width))
def connect_to_pads(self, pads, mode="master"):
return connect_to_pads(self, pads, mode)
r = connect_to_pads(self, pads, mode)
if mode == "master":
r.append(pads.wlast.eq(self.w.last))
r.append(self.r.last.eq(pads.rlast))
else:
r.append(pads.rlast.eq(self.r.last))
r.append(self.w.last.eq(pads.wlast))
return r
def get_ios(self, bus_name="wb"):
subsignals = []
for channel in ["aw", "w", "b", "ar", "r"]:
for name in ["valid", "ready"]:
subsignals.append(Subsignal(channel + name, Pins(1)))
for name, width in getattr(self, channel).description.payload_layout:
subsignals.append(Subsignal(channel + name, Pins(width)))
subsignals.append(Subsignal("rlast", Pins(1)))
subsignals.append(Subsignal("wlast", Pins(1)))
ios = [(bus_name , 0) + tuple(subsignals)]
return ios
def connect(self, slave, **kwargs):
return _connect_axi(self, slave, **kwargs)