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cores/clock/intel_common: fix N factor not get passed to ALTPLL primitive 

The N factor is currently ignored when creating ALTPLL instance.

As Quartus will internally decide N based on all dividers, just multiply
N to all clock outputs' individual divider.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
This commit is contained in:
Icenowy Zheng 2022-06-13 22:49:14 +08:00
parent 49d0463394
commit 58f9a79cf3
1 changed files with 1 additions and 1 deletions
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2
litex/soc/cores/clock/intel_common.py
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@ -79,7 +79,7 @@ class IntelClocking(Module, AutoCSR):
diff = abs(clk_freq - f)
if diff <= f*_m and diff < best_diff:
config[f"clk{_n}_freq"] = clk_freq
config[f"clk{_n}_divide"] = c
config[f"clk{_n}_divide"] = c * n
config[f"clk{_n}_phase"] = p
clk_valid[_n] = True
diff_ratios[_n] = diff / f