cpu/rocket/core: Move IO Region (ROM/SRAM can't be in an IO Region).

2022-01-06 15:32:31 +01:00 · 2022-01-06 15:32:31 +01:00 · 5c278ae437
parent 23b9d73354
commit 5c278ae437
1 changed files with 1 additions and 1 deletions
--- a/litex/soc/cores/cpu/rocket/core.py
+++ b/litex/soc/cores/cpu/rocket/core.py
@ -98,7 +98,7 @@ class RocketRV64(CPU):
    gcc_triple           = CPU_GCC_TRIPLE_RISCV64
    linker_output_format = "elf64-littleriscv"
    nop                  = "nop"
-    io_regions           = {0x10000000: 0x70000000} # Origin, Length.
+    io_regions           = {0x12000000: 0x70000000} # Origin, Length.

    # Memory Mapping.
    @property