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Vexriscv "lite" uses "--mulDiv true", so enable "mul" instructions.

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Signed-off-by: Tim Callahan <tcal@google.com>
This commit is contained in:
Tim Callahan 2021-02-14 14:16:14 -08:00
parent ead12df21b
commit 5cb467cae3
1 changed files with 2 additions and 2 deletions
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4
litex/soc/cores/cpu/vexriscv/core.py
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@ -49,8 +49,8 @@ GCC_FLAGS = {
# imacfd
"minimal": "-march=rv32i -mabi=ilp32",
"minimal+debug": "-march=rv32i -mabi=ilp32",
"lite": "-march=rv32i -mabi=ilp32",
"lite+debug": "-march=rv32i -mabi=ilp32",
"lite": "-march=rv32im -mabi=ilp32",
"lite+debug": "-march=rv32im -mabi=ilp32",
"standard": "-march=rv32im -mabi=ilp32",
"standard+debug": "-march=rv32im -mabi=ilp32",
"imac": "-march=rv32imac -mabi=ilp32",