targets: simplify Ethernet/Etherbone integration on targets with both.

This commit is contained in:
Florent Kermarrec 2020-05-29 19:22:35 +02:00
parent 55c7461e7b
commit 5cc564fb8f
2 changed files with 12 additions and 22 deletions

View File

@ -79,21 +79,16 @@ class BaseSoC(SoCCore):
l2_cache_reverse = True l2_cache_reverse = True
) )
# Ethernet --------------------------------------------------------------------------------- # Ethernet / Etherbone ---------------------------------------------------------------------
if with_ethernet: if with_ethernet or with_etherbone:
self.submodules.ethphy = LiteEthPHYMII( self.submodules.ethphy = LiteEthPHYMII(
clock_pads = self.platform.request("eth_clocks"), clock_pads = self.platform.request("eth_clocks"),
pads = self.platform.request("eth")) pads = self.platform.request("eth"))
self.add_csr("ethphy") self.add_csr("ethphy")
self.add_ethernet(phy=self.ethphy) if with_ethernet:
self.add_ethernet(phy=self.ethphy)
# Etherbone -------------------------------------------------------------------------------- if with_etherbone:
if with_etherbone: self.add_etherbone(phy=self.ethphy)
self.submodules.ethphy = LiteEthPHYMII(
clock_pads = self.platform.request("eth_clocks"),
pads = self.platform.request("eth"))
self.add_csr("ethphy")
self.add_etherbone(phy=self.ethphy)
# Leds ------------------------------------------------------------------------------------- # Leds -------------------------------------------------------------------------------------
self.submodules.leds = LedChaser( self.submodules.leds = LedChaser(

View File

@ -70,21 +70,16 @@ class BaseSoC(SoCCore):
l2_cache_reverse = True l2_cache_reverse = True
) )
# Ethernet --------------------------------------------------------------------------------- # Ethernet / Etherbone ---------------------------------------------------------------------
if with_ethernet: if with_ethernet or with_etherbone:
self.submodules.ethphy = LiteEthPHYRGMII( self.submodules.ethphy = LiteEthPHYRGMII(
clock_pads = self.platform.request("eth_clocks"), clock_pads = self.platform.request("eth_clocks"),
pads = self.platform.request("eth")) pads = self.platform.request("eth"))
self.add_csr("ethphy") self.add_csr("ethphy")
self.add_ethernet(phy=self.ethphy) if with_ethernet:
self.add_ethernet(phy=self.ethphy)
# Etherbone -------------------------------------------------------------------------------- if with_etherbone:
if with_etherbone: self.add_etherbone(phy=self.ethphy)
self.submodules.ethphy = LiteEthPHYRGMII(
clock_pads = self.platform.request("eth_clocks"),
pads = self.platform.request("eth"))
self.add_csr("ethphy")
self.add_etherbone(phy=self.ethphy)
# Leds ------------------------------------------------------------------------------------- # Leds -------------------------------------------------------------------------------------
self.submodules.leds = LedChaser( self.submodules.leds = LedChaser(