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bios: we can now use -Ot with_rom True on targets to force bios implementation in integrated rom (can speed up debug we don't want to reflash SPI or NOR flash)

This commit is contained in:
Florent Kermarrec 2015-02-27 17:22:44 +01:00
parent b031c5edae
commit 5e2e9338d2
4 changed files with 26 additions and 21 deletions
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3
targets/kc705.py
View File

@ -98,7 +98,8 @@ class BaseSoC(SDRAMSoC):
self.submodules.ddrphy = k7ddrphy.K7DDRPHY(platform.request("ddram"), memtype="DDR3") self.submodules.ddrphy = k7ddrphy.K7DDRPHY(platform.request("ddram"), memtype="DDR3")
self.register_sdram_phy(self.ddrphy.dfi, self.ddrphy.phy_settings, sdram_geom, sdram_timing) self.register_sdram_phy(self.ddrphy.dfi, self.ddrphy.phy_settings, sdram_geom, sdram_timing)
# BIOS is in SPI flash # If not in ROM, BIOS is in SPI flash
if not self.with_rom:
spiflash_pads = platform.request("spiflash") spiflash_pads = platform.request("spiflash")
spiflash_pads.clk = Signal() spiflash_pads.clk = Signal()
self.specials += Instance("STARTUPE2", self.specials += Instance("STARTUPE2",

2
targets/mlabs_video.py
View File

@ -54,6 +54,8 @@ class BaseSoC(SDRAMSoC):
rd_bitslip=0, wr_bitslip=3, dqs_ddr_alignment="C1") rd_bitslip=0, wr_bitslip=3, dqs_ddr_alignment="C1")
self.register_sdram_phy(self.ddrphy.dfi, self.ddrphy.phy_settings, sdram_geom, sdram_timing) self.register_sdram_phy(self.ddrphy.dfi, self.ddrphy.phy_settings, sdram_geom, sdram_timing)
# If not in ROM, BIOS is in // NOR flash
if not self.with_rom:
self.submodules.norflash = norflash16.NorFlash16(platform.request("norflash"), self.submodules.norflash = norflash16.NorFlash16(platform.request("norflash"),
self.ns(110), self.ns(50)) self.ns(110), self.ns(50))
self.flash_boot_address = 0x001a0000 self.flash_boot_address = 0x001a0000

3
targets/pipistrello.py
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@ -97,7 +97,8 @@ class BaseSoC(SDRAMSoC):
self.submodules.sdrphy = gensdrphy.GENSDRPHY(platform.request("sdram")) self.submodules.sdrphy = gensdrphy.GENSDRPHY(platform.request("sdram"))
self.register_sdram_phy(self.sdrphy.dfi, self.sdrphy.phy_settings, sdram_geom, sdram_timing) self.register_sdram_phy(self.sdrphy.dfi, self.sdrphy.phy_settings, sdram_geom, sdram_timing)
# BIOS is in SPI flash # If not in ROM, BIOS is in SPI flash
if not self.with_rom:
self.submodules.spiflash = spiflash.SpiFlash(platform.request("spiflash2x"), dummy=4, div=6) self.submodules.spiflash = spiflash.SpiFlash(platform.request("spiflash2x"), dummy=4, div=6)
self.flash_boot_address = 0x70000 self.flash_boot_address = 0x70000
self.register_rom(self.spiflash.bus) self.register_rom(self.spiflash.bus)

3
targets/ppro.py
View File

@ -91,7 +91,8 @@ class BaseSoC(SDRAMSoC):
self.submodules.sdrphy = gensdrphy.GENSDRPHY(platform.request("sdram")) self.submodules.sdrphy = gensdrphy.GENSDRPHY(platform.request("sdram"))
self.register_sdram_phy(self.sdrphy.dfi, self.sdrphy.phy_settings, sdram_geom, sdram_timing) self.register_sdram_phy(self.sdrphy.dfi, self.sdrphy.phy_settings, sdram_geom, sdram_timing)
# BIOS is in SPI flash # If not in ROM, BIOS is in SPI flash
if not self.with_rom:
self.submodules.spiflash = spiflash.SpiFlash(platform.request("spiflash2x"), dummy=4, div=6) self.submodules.spiflash = spiflash.SpiFlash(platform.request("spiflash2x"), dummy=4, div=6)
self.flash_boot_address = 0x70000 self.flash_boot_address = 0x70000
self.register_rom(self.spiflash.bus) self.register_rom(self.spiflash.bus)