soc/cores/jtag: Revert p_INIT since not tested.

2024-10-28 20:05:47 +01:00 · 2024-10-28 20:05:47 +01:00 · 61ab30a739
parent 10184ad325
commit 61ab30a739
1 changed files with 1 additions and 1 deletions
--- a/litex/soc/cores/jtag.py
+++ b/litex/soc/cores/jtag.py
@ -379,7 +379,7 @@ class ECP5JTAG(LiteXModule):
            new_tck = Signal()
            self.specials += Instance("LUT4",
                attr   = {"keep"},
-                p_init = 2,
+                p_INIT = 2,
                i_A = tck,
                i_B = 0,
                i_C = 0,