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tools/litex_json2dts/soc_controller: add workaround for VexRiscv-SMP. 

We need to fix https://github.com/litex-hub/linux-on-litex-vexriscv/issues/176
to be able to switch to soc-controller with VexRiscv-SMP.
This commit is contained in:
Florent Kermarrec 2020-12-29 09:29:23 +01:00
parent d5bf09d8f4
commit 7627dadb9b
1 changed files with 11 additions and 1 deletions
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12
litex/tools/litex_json2dts.py
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@ -141,7 +141,17 @@ def generate_dts(d, initrd_start=None, initrd_size=None, polling=False):
# SoC Controller -------------------------------------------------------------------------------
dts += """
if cpu_name == "vexriscv smp-linux": # FIXME: remove when kernel will be generated from litex-rebase.
dts += """
soc_ctrl0: soc_controller@{soc_ctrl_csr_base:x} {{
compatible = "litex,soc_controller";
reg = <0x{soc_ctrl_csr_base:x} 0xc>;
status = "okay";
}};
""".format(soc_ctrl_csr_base=d["csr_bases"]["ctrl"])
else:
dts += """
soc_ctrl0: soc_controller@{soc_ctrl_csr_base:x} {{
compatible = "litex,soc-controller";
reg = <0x{soc_ctrl_csr_base:x} 0xc>;