tools/litex_json2dts/soc_controller: add workaround for VexRiscv-SMP.
We need to fix https://github.com/litex-hub/linux-on-litex-vexriscv/issues/176 to be able to switch to soc-controller with VexRiscv-SMP.
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@ -141,6 +141,16 @@ def generate_dts(d, initrd_start=None, initrd_size=None, polling=False):
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# SoC Controller -------------------------------------------------------------------------------
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if cpu_name == "vexriscv smp-linux": # FIXME: remove when kernel will be generated from litex-rebase.
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dts += """
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soc_ctrl0: soc_controller@{soc_ctrl_csr_base:x} {{
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compatible = "litex,soc_controller";
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reg = <0x{soc_ctrl_csr_base:x} 0xc>;
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status = "okay";
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}};
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""".format(soc_ctrl_csr_base=d["csr_bases"]["ctrl"])
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else:
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dts += """
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soc_ctrl0: soc_controller@{soc_ctrl_csr_base:x} {{
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compatible = "litex,soc-controller";
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