test/support: fix default ncycles

2014-03-24 09:32:26 -06:00 · 2014-03-24 09:32:26 -06:00 · 7649028bdc
parent 0023b742e4
commit 7649028bdc
1 changed files with 1 additions and 1 deletions
--- a/migen/test/support.py
+++ b/migen/test/support.py
@ -17,6 +17,6 @@ class SimCase:
 	def test_to_verilog(self):
 		verilog.convert(self.tb)

-	def run_with(self, cb, ncycles=-1):
+	def run_with(self, cb, ncycles=None):
 		self.tb.callback = cb
 		run_simulation(self.tb, ncycles=ncycles)