Hardware
/
litex
mirror of https://github.com/enjoy-digital/litex.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

cores/cpu/vexriscv_smp: fix PLIC_EXT_IRQ_BASE

This commit is contained in:
Dolu1990 2024-05-14 14:24:37 +02:00
parent 3506a5e82d
commit 786c929f08
2 changed files with 5 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
litex/soc/cores/cpu/vexriscv_smp/irq.h
View File

@ -18,7 +18,7 @@ extern "C" {
#define PLIC_THRSHLD 0xf0e00000L // Per-pin priority must be >= this to trigger
#define PLIC_CLAIM 0xf0e00004L // Claim & completion register address
#define PLIC_EXT_IRQ_BASE 1 // CHECKME/FIXME.
#define PLIC_EXT_IRQ_BASE 0 // CHECKME/FIXME.
static inline unsigned int irq_getie(void)
{
@ -32,17 +32,17 @@ static inline void irq_setie(unsigned int ie)
static inline unsigned int irq_getmask(void)
{
return *((unsigned int *)PLIC_ENABLED) >> 1;
return *((unsigned int *)PLIC_ENABLED) >> PLIC_EXT_IRQ_BASE;
}
static inline void irq_setmask(unsigned int mask)
{
*((unsigned int *)PLIC_ENABLED) = mask << 1;
*((unsigned int *)PLIC_ENABLED) = mask << PLIC_EXT_IRQ_BASE;
}
static inline unsigned int irq_pending(void)
{
return *((unsigned int *)PLIC_PENDING) >> 1;
return *((unsigned int *)PLIC_PENDING) >> PLIC_EXT_IRQ_BASE;
}
#ifdef __cplusplus

2
litex/soc/software/libbase/isr.c
View File

@ -29,7 +29,7 @@ void isr(void)
onetime++;
}
}
#elif defined(__rocket__) || defined(__openc906__)
#elif defined(__rocket__) || defined(__openc906__) || defined(__vexriscv_smp__)
// PLIC initialization.
void plic_init(void);