i2c: automatic device init by the BIOS
The BIOS can now initialize I2C peripherals during the boot.
The add_i2c_init_table method of the soc speficy parameters:
self.submodules.i2c = I2CMaster(pads)
self.add_i2c_init_table("i2c", i2c_addr=0x4c, table=it6263_i2c_hdmi_tx)
it6263_i2c_hdmi_tx = [
(0x05, 0x40),
(0x04, 0x3D),
(0x04, 0x1D)
...
The table is a list of tupple as (address, value).
This commit is contained in:
Franck Jullien
parent
6f6a10db5c
commit
7a714c74af
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@ -203,6 +203,10 @@ class Builder:
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csr_base = self.soc.mem_regions['csr'].origin)
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write_to_file(os.path.join(self.generated_dir, "csr.h"), csr_contents)
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# Generate I2C command/value table
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i2c_contents = export.get_i2c_header(self.soc.i2c_init)
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write_to_file(os.path.join(self.generated_dir, "i2c.h"), i2c_contents)
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# Generate Git SHA1 of tools to git.h
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git_contents = export.get_git_header()
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write_to_file(os.path.join(self.generated_dir, "git.h"), git_contents)
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@ -272,6 +272,47 @@ def get_csr_header(regions, constants, csr_base=None, with_access_functions=True
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r += "\n#endif\n"
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return r
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def get_i2c_header(i2c_init_values):
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r = generated_banner("//")
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r += "#ifndef __GENERATED_I2C_H\n#define __GENERATED_I2C_H\n\n"
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if i2c_init_values:
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r += "#include <libbase/i2c.h>\n\n"
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r += "struct i2c_cmds {\n"
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r += "\tstruct i2c_ops ops;\n"
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r += "\tuint32_t *init_table;\n"
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r += "\tint nb_cmds;\n"
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r += "\tint addr_len;\n"
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r += "\tint i2c_addr;\n"
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r += "};\n"
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r += "\n#define I2C_INIT\n"
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r += "#define I2C_INIT_DEVS {}\n\n".format(len(i2c_init_values))
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for i, (dev, i2c_addr, table, _) in enumerate(i2c_init_values):
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r += "uint32_t {}_{}_{}_init_table[{}] = {{\n".format(dev, hex(i2c_addr), i, len(table) * 2)
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for addr, data in table:
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r += "\t0x{:04X}, 0x{:02X},\n".format(addr, data)
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r += "};\n"
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r += "static struct i2c_cmds i2c_init[I2C_INIT_DEVS] = {\n"
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for i, (dev, i2c_addr, table, addr_len) in enumerate(i2c_init_values):
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r += "\t{\n"
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r += "\t\t.ops.write = {}_w_write,\n".format(dev)
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r += "\t\t.ops.read = {}_r_read,\n".format(dev)
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r += "\t\t.init_table = {}_{}_{}_init_table,\n".format(dev, hex(i2c_addr), i)
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r += "\t\t.nb_cmds = {},\n".format(len(table))
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r += "\t\t.i2c_addr = {},\n".format(hex(i2c_addr))
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r += "\t\t.addr_len = {},\n".format(addr_len)
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r += "\t},\n"
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r += "};\n"
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else:
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r += "\n// No initialization values\n"
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r += "\n#endif\n"
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return r
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# JSON Export --------------------------------------------------------------------------------------
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def get_csr_json(csr_regions={}, constants={}, mem_regions={}):
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@ -174,6 +174,9 @@ class SoCCore(LiteXSoC):
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# Wishbone Slaves.
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self.wb_slaves = {}
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# I2C initialisation tables
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self.i2c_init = []
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# Modules instances ------------------------------------------------------------------------
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# Add SoCController
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@ -269,6 +272,9 @@ class SoCCore(LiteXSoC):
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def add_csr_region(self, name, origin, busword, obj):
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self.csr_regions[name] = SoCCSRRegion(origin, busword, obj)
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def add_i2c_init_table(self, dev, i2c_addr, table, addr_len=1):
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self.i2c_init.append((dev, i2c_addr, table, addr_len))
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# Finalization ---------------------------------------------------------------------------------
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def do_finalize(self):
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@ -36,6 +36,7 @@
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#include <libbase/spiflash.h>
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#include <libbase/uart.h>
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#include <libbase/i2c.h>
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#include <liblitedram/sdram.h>
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@ -91,6 +92,10 @@ __attribute__((__used__)) int main(int i, char **c)
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uart_init();
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#endif
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#ifdef CSR_I2C_BASE
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i2c_send_init_cmds();
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#endif
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#ifndef CONFIG_SIM_DISABLE_BIOS_PROMPT
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printf("\n");
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printf("\e[1m __ _ __ _ __\e[0m\n");
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@ -1,13 +1,20 @@
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// This file is Copyright (c) 2020 Antmicro <www.antmicro.com>
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// This file is Copyright (c) 2022 Franck Jullien <franck.jullien@collshade.fr>
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#include "i2c.h"
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#include <stdio.h>
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#include <generated/csr.h>
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#include <generated/i2c.h>
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#ifdef CSR_I2C_BASE
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#define I2C_PERIOD_CYCLES (CONFIG_CLOCK_FREQUENCY / I2C_FREQ_HZ)
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#define I2C_DELAY(n) cdelay((n)*I2C_PERIOD_CYCLES/4)
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i2c_write_t current_i2c_write = i2c_w_write;
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i2c_read_t current_i2c_read = i2c_r_read;
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static inline void cdelay(int i)
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{
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while(i > 0) {
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@ -16,9 +23,47 @@ static inline void cdelay(int i)
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}
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}
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int i2c_send_init_cmds(void)
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{
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#ifdef I2C_INIT
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struct i2c_cmds *i2c_cmd;
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int dev, i, len;
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uint8_t data[2];
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uint8_t addr;
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for (dev = 0; dev < I2C_INIT_DEVS; dev++) {
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i2c_cmd = &i2c_init[dev];
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current_i2c_write = i2c_cmd->ops.write;
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current_i2c_read = i2c_cmd->ops.read;
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for (i = 0; i < i2c_cmd->nb_cmds; i++) {
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if (i2c_cmd->addr_len == 2) {
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len = 2;
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addr = (i2c_cmd->init_table[i*2] >> 8) & 0xff;
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data[0] = i2c_cmd->init_table[i*2] & 0xff;
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data[1] = i2c_cmd->init_table[(i*2) + 1] & 0xff;
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} else {
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len = 1;
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addr = i2c_cmd->init_table[i*2] & 0xff;
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data[0] = i2c_cmd->init_table[(i*2) + 1] & 0xff;
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}
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if (!i2c_write(i2c_cmd->i2c_addr, addr, data, len))
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printf("Error during i2c write at address 0x%04x\n", addr);
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}
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}
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current_i2c_write = i2c_w_write;
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current_i2c_read = i2c_r_read;
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#endif
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return 0;
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}
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static inline void i2c_oe_scl_sda(bool oe, bool scl, bool sda)
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{
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i2c_w_write(
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current_i2c_write(
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((oe & 1) << CSR_I2C_W_OE_OFFSET) |
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((scl & 1) << CSR_I2C_W_SCL_OFFSET) |
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((sda & 1) << CSR_I2C_W_SDA_OFFSET)
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@ -69,7 +114,7 @@ static int i2c_receive_bit(void)
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i2c_oe_scl_sda(0, 1, 0);
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I2C_DELAY(1);
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// read in the middle of SCL high
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value = i2c_r_read() & 1;
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value = current_i2c_read() & 1;
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I2C_DELAY(1);
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i2c_oe_scl_sda(0, 0, 0);
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I2C_DELAY(1);
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@ -6,6 +6,15 @@ extern "C" {
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#endif
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#include <stdbool.h>
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#include <stdint.h>
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typedef void (*i2c_write_t)(uint32_t v);
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typedef uint32_t (*i2c_read_t)(void);
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struct i2c_ops {
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i2c_write_t write;
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i2c_read_t read;
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};
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/* I2C frequency defaults to a safe value in range 10-100 kHz to be compatible with SMBus */
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#ifndef I2C_FREQ_HZ
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@ -19,6 +28,7 @@ void i2c_reset(void);
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bool i2c_write(unsigned char slave_addr, unsigned char addr, const unsigned char *data, unsigned int len);
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bool i2c_read(unsigned char slave_addr, unsigned char addr, unsigned char *data, unsigned int len, bool send_stop);
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bool i2c_poll(unsigned char slave_addr);
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int i2c_send_init_cmds(void);
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#ifdef __cplusplus
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}
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