soc/integration/soc_dram: sync with litedram
This commit is contained in:
parent
dca8b3c92e
commit
7a7b9420e6
|
@ -25,7 +25,7 @@ class ControllerInjector(Module, AutoCSR):
|
||||||
controller_settings)
|
controller_settings)
|
||||||
self.comb += controller.dfi.connect(self.dfii.slave)
|
self.comb += controller.dfi.connect(self.dfii.slave)
|
||||||
|
|
||||||
self.submodules.crossbar = crossbar.LiteDRAMCrossbar(controller.lasmic, controller.nrowbits)
|
self.submodules.crossbar = crossbar.LiteDRAMCrossbar(controller.interface, controller.nrowbits)
|
||||||
|
|
||||||
|
|
||||||
class SoCSDRAM(SoCCore):
|
class SoCSDRAM(SoCCore):
|
||||||
|
|
Loading…
Reference in New Issue