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boards/targets/sim: fix

This commit is contained in:
Florent Kermarrec 2016-10-14 17:49:04 +02:00
parent 677243bd8c
commit 7a9cf57cfe
1 changed files with 1 additions and 1 deletions
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2
litex/boards/targets/sim.py
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@ -51,7 +51,7 @@ class BaseSoC(SoCSDRAM):
self.register_sdram(self.sdrphy, self.register_sdram(self.sdrphy,
sdram_module.geom_settings, sdram_module.geom_settings,
sdram_module.timing_settings, sdram_module.timing_settings,
ControllerSettings(with_refresh=False)) controller_settings=ControllerSettings(with_refresh=False))
# reduce memtest size to speed up simulation # reduce memtest size to speed up simulation
self.add_constant("MEMTEST_DATA_SIZE", 8*1024) self.add_constant("MEMTEST_DATA_SIZE", 8*1024)
self.add_constant("MEMTEST_ADDR_SIZE", 8*1024) self.add_constant("MEMTEST_ADDR_SIZE", 8*1024)