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efinix/dbparser: support more Titanium pll_in pins

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* Veridied to fix using A11 on Ti60F255. Without this the wrong GPIO was silently used
* Seems to correctly select PLL_IN clock for these Ti60F255 pins:
** H6, B2, C5, E6, A11, C14, L11, R13, P11, R5, A2
This commit is contained in:
Andrew Dennison 2023-05-12 13:19:29 +10:00 committed by Florent Kermarrec
parent e10643bfd5
commit 8066a9e265
1 changed files with 1 additions and 1 deletions
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2
litex/build/efinix/dbparser.py
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@ -112,7 +112,7 @@ class EfinixDbParser:
if i == None: if i == None:
continue continue
if (i == inst) or (inst + '.' in i): if (i == inst) or (inst + '.' in i):
refclk_no = 0 refclk_no = 0 if self.device[:2] != "Ti" else c.get('index')
if c.get('index') == '3': if c.get('index') == '3':
refclk_no = 1 refclk_no = 1
return (p.get('name'), refclk_no) return (p.get('name'), refclk_no)