Hardware/litex
1
0
Fork 0
mirror of https://github.com/enjoy-digital/litex.git synced 2025-01-04 09:52:26 -05:00
Code Issues Projects Releases Packages Wiki Activity

cpu/gowin_emcu: Add missing reset signals.

Browse source
This commit is contained in:
Florent Kermarrec 2024-01-03 19:41:03 +01:00
parent 3f9de470f6
commit 85ef3bd8a7
1 changed files with 3 additions and 3 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

6
litex/soc/cores/cpu/gowin_emcu/core.py
View file

@ -63,8 +63,8 @@ class GowinEMCU(CPU):
self.cpu_params.update(
# Clk/Rst.
i_FCLK = ClockSignal("sys"),
i_PORESETN = ~self.reset,
i_SYSRESETN = ~self.reset,
i_PORESETN = ~ResetSignal("sys") & ~self.reset,
i_SYSRESETN = ~ResetSignal("sys") & ~self.reset,
i_MTXREMAP = Signal(4, reset=0b1111),
o_MTXHRESETN = bus_reset_n,
@ -124,7 +124,7 @@ class GowinEMCU(CPU):
i_CEB = ~sram0_wren[i // 2],
i_CLKA = ClockSignal("sys"),
i_CLKB = ClockSignal("sys"),
i_RESETA = 0,
i_RESETA = ~bus_reset_n,
i_RESETB = ~bus_reset_n,
i_OCE = 1,
i_BLKSELA = Cat(sram0_cs, sram0_cs, sram0_cs),