soc/build: Minimize changes added by #1809 and review.
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@ -9,7 +9,6 @@ import sys
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import logging
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import argparse
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import importlib
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import time
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from litex.soc.cores import cpu
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from litex.soc.integration import soc_core
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@ -66,9 +65,6 @@ class LiteXArgumentParser(argparse.ArgumentParser):
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self.set_platform(platform)
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self.add_target_group()
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self.add_logging_group()
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# workaround for backward compatibility
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self._rm_jtagbone = False
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self._rm_uartbone = False
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def set_platform(self, platform):
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""" set platform. Check first if not already set
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@ -110,17 +106,13 @@ class LiteXArgumentParser(argparse.ArgumentParser):
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""" wrapper to add argument to "Target options group" from outer of this
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class
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"""
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arg = args[0]
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if arg in ["--with-jtagbone", "--with-uartbone"]:
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if arg == "--with-jtagbone":
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if args[0] in ["--with-jtagbone", "--with-uartbone"]:
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if args[0] == "--with-jtagbone":
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self._rm_jtagbone = True
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else:
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if args[0] == "--with-uartbone":
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self._rm_uartbone = True
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print("Warning {} {} {}".format(
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colorer(arg, color="red"),
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colorer(" is added by SoCCore. ", color="red"),
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colorer("Please remove this option from target", color="yellow")))
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time.sleep(2)
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from litex.compat import compat_notice
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compat_notice(f"Adding {args[0]} in target", date="2023-10-23", info=f"{args[0]} is now directly added by SoCCore, please remove from target.")
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return # bypass insert
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if self._target_group is None:
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self._target_group = self.add_argument_group(title="Target options")
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@ -169,9 +161,9 @@ class LiteXArgumentParser(argparse.ArgumentParser):
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soc_arg = soc_core.soc_core_argdict(self._args) # FIXME: Rename to soc_argdict in the future.
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# Work around for backward compatibility
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if self._rm_jtagbone:
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if getattr(self, "_rm_jtagbone", False):
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soc_arg.pop("with_jtagbone")
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if self._rm_uartbone:
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if getattr(self, "_rm_uartbone", False):
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soc_arg.pop("with_uartbone")
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return soc_arg
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@ -1460,6 +1460,15 @@ class LiteXSoC(SoC):
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from litex.soc.cores import uart
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from litex.soc.cores.jtag import JTAGPHY
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# Check if JTAGBone is supported (SPI only device or no user access).
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if not self.platform.jtag_support:
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self.logger.error("{} {} on {} device.".format(
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colorer("JTAGBone"),
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colorer("not supported", color="red"),
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colorer(self.platform.device)
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))
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raise SoCError()
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# Core.
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self.check_if_exists(name)
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jtagbone_phy = JTAGPHY(device=self.platform.device, chain=chain, platform=self.platform)
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@ -183,15 +183,10 @@ class SoCCore(LiteXSoC):
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# Parameters check validity ----------------------------------------------------------------
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# Check if jtagbone is supported (SPI only device or no user access).
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if with_jtagbone:
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if not platform.jtag_support:
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self.logger.error("{} {} with {} FPGA".format(
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colorer("JTAGBone isn't supported for platform", color="red"),
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platform.name, platform.device))
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raise SoCError()
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# FIXME: Move to soc.py?
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if with_uart:
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# crossover+uartbone is kept as backward compatibility
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# crossover+uartbone is kept as backward compatibility
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if uart_name == "crossover+uartbone":
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self.logger.warning("{} UART: is deprecated {}".format(
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colorer(uart_name, color="yellow"),
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@ -201,9 +196,9 @@ class SoCCore(LiteXSoC):
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self._uartbone = True
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uart_name = "crossover"
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# JTAGBone and jtag_uart can't be used at the same time.
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# JTAGBone and jtag_uart can't be used at the same time.
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assert not (with_jtagbone and uart_name == "jtag_uart")
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# UARTBone and serial can't be used at the same time.
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# UARTBone and serial can't be used at the same time.
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assert not (with_uartbone and uart_name == "serial")
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# Modules instances ------------------------------------------------------------------------
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