xilinx/programmer: add source of vivado's settings (need to be tested on a linux machine)
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@ -1,6 +1,7 @@
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import subprocess
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import subprocess
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from mibuild.generic_programmer import GenericProgrammer
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from mibuild.generic_programmer import GenericProgrammer
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from mibuild.xilinx import common
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def _run_urjtag(cmds):
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def _run_urjtag(cmds):
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with subprocess.Popen("jtag", stdin=subprocess.PIPE) as process:
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with subprocess.Popen("jtag", stdin=subprocess.PIPE) as process:
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@ -62,6 +63,12 @@ class FpgaProg(GenericProgrammer):
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subprocess.call(["fpgaprog", "-v", "-sa", "-r", "-b", flash_proxy,
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subprocess.call(["fpgaprog", "-v", "-sa", "-r", "-b", flash_proxy,
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"-f", data_file])
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"-f", data_file])
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def _source_vivado(vivado_path, ver=None):
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if sys.platform == "win32" or sys.platform == "cygwin":
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pass
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else:
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settings = common.settings(vivado_path, ver)
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subprocess.call(["source", settings])
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def _run_vivado(cmds):
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def _run_vivado(cmds):
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with subprocess.Popen("vivado -mode tcl", stdin=subprocess.PIPE, shell=True) as process:
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with subprocess.Popen("vivado -mode tcl", stdin=subprocess.PIPE, shell=True) as process:
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@ -70,6 +77,9 @@ def _run_vivado(cmds):
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class VivadoProgrammer(GenericProgrammer):
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class VivadoProgrammer(GenericProgrammer):
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needs_bitreverse = False
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needs_bitreverse = False
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def __init__(self, vivado_path="/opt/Xilinx/Vivado"):
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GenericProgrammer.__init__(self)
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_source_vivado(vivado_path)
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def load_bitstream(self, bitstream_file):
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def load_bitstream(self, bitstream_file):
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cmds = """open_hw
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cmds = """open_hw
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