Remove explicit bus names

milkymist/lm32/__init__.py

@@ -3,8 +3,8 @@ from migen.bus import wishbone
 
 class LM32:
 	def __init__(self):
-		self.ibus = i = wishbone.Master("lm32i")
-		self.dbus = d = wishbone.Master("lm32d")
+		self.ibus = i = wishbone.Master()
+		self.dbus = d = wishbone.Master()
 		self.interrupt = Signal(BV(32))
 		self.ext_break = Signal()
 		self._inst = Instance("lm32_top",

milkymist/norflash/__init__.py

@@ -4,7 +4,7 @@ from migen.corelogic import timeline
 
 class NorFlash:
 	def __init__(self, adr_width, rd_timing):
-		self.bus = wishbone.Slave("norflash")
+		self.bus = wishbone.Slave()
 		self.adr = Signal(BV(adr_width-1))
 		self.d = Signal(BV(16))
 		self.oe_n = Signal()

milkymist/sram/__init__.py

@@ -3,7 +3,7 @@ from migen.bus import wishbone
 
 class SRAM:
 	def __init__(self, depth):
-		self.bus = wishbone.Slave("sram")
+		self.bus = wishbone.Slave()
 		self.depth = depth
 	
 	def get_fragment(self):