Hardware
/
litex
mirror of https://github.com/enjoy-digital/litex.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

build/osfpga: Fix device support.

This commit is contained in:
Florent Kermarrec 2022-06-08 18:25:50 +02:00
parent eeed11edea
commit 8ccfc96b1a
2 changed files with 5 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
litex/build/osfpga/osfpga.py
View File

@ -33,9 +33,7 @@ def _build_tcl(name, device, files, build_name, include_paths):
tcl.append(f"create_design {build_name}") tcl.append(f"create_design {build_name}")
# Set Device. # Set Device.
# FIXME: Directly pass Devices instead of Macro when possible. tcl.append(f"target_device {device.upper()}")
macro = {"test": "P1=10 P2=20"}[device]
tcl.append(f"set_macro {macro}")
# Add Include Path. # Add Include Path.
tcl.append("add_include_path ./") tcl.append("add_include_path ./")

7
litex/build/osfpga/test_soc.py
View File

@ -29,8 +29,8 @@ _io = [
] ]
class Platform(OSFPGAPlatform): class Platform(OSFPGAPlatform):
def __init__(self, toolchain="foedag"): def __init__(self, toolchain="foedag", device="mpw1"):
OSFPGAPlatform.__init__(self, device="test", toolchain=toolchain, io=_io) OSFPGAPlatform.__init__(self, device=device, toolchain=toolchain, io=_io)
# BaseSoC ------------------------------------------------------------------------------------------ # BaseSoC ------------------------------------------------------------------------------------------
@ -50,11 +50,12 @@ def main():
target_group = parser.add_argument_group(title="Target options") target_group = parser.add_argument_group(title="Target options")
target_group.add_argument("--build", action="store_true", help="Build design.") target_group.add_argument("--build", action="store_true", help="Build design.")
target_group.add_argument("--toolchain", default="foedag", help="FPGA toolchain.") target_group.add_argument("--toolchain", default="foedag", help="FPGA toolchain.")
target_group.add_argument("--device", default="mpw1", help="FPGA device.")
builder_args(parser) builder_args(parser)
soc_core_args(parser) soc_core_args(parser)
args = parser.parse_args() args = parser.parse_args()
platform = Platform(toolchain=args.toolchain) platform = Platform(toolchain=args.toolchain, device=args.device)
soc = BaseSoC(platform,**soc_core_argdict(args)) soc = BaseSoC(platform,**soc_core_argdict(args))
builder = Builder(soc, **builder_argdict(args)) builder = Builder(soc, **builder_argdict(args))
if args.build: if args.build: