targets/arty: add variant support through --variant argument.
./arty.py --variant=a7-35 or a7-100
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@ -54,8 +54,8 @@ class _CRG(Module):
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# BaseSoC ------------------------------------------------------------------------------------------
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class BaseSoC(SoCCore):
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def __init__(self, toolchain="vivado", sys_clk_freq=int(100e6), with_ethernet=False, with_etherbone=False, ident_version=True, **kwargs):
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platform = arty.Platform(toolchain=toolchain)
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def __init__(self, variant="a7-35", toolchain="vivado", sys_clk_freq=int(100e6), with_ethernet=False, with_etherbone=False, ident_version=True, **kwargs):
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platform = arty.Platform(variant=variant, toolchain=toolchain)
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# SoCCore ----------------------------------------------------------------------------------
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SoCCore.__init__(self, platform, sys_clk_freq,
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@ -107,6 +107,7 @@ def main():
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parser.add_argument("--toolchain", default="vivado", help="Toolchain use to build (default: vivado)")
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parser.add_argument("--build", action="store_true", help="Build bitstream")
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parser.add_argument("--load", action="store_true", help="Load bitstream")
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parser.add_argument("--variant", default="a7-35", help="Board variant: a7-35 (default) or a7-100")
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parser.add_argument("--sys-clk-freq", default=100e6, help="System clock frequency (default: 100MHz)")
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parser.add_argument("--with-ethernet", action="store_true", help="Enable Ethernet support")
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parser.add_argument("--with-etherbone", action="store_true", help="Enable Etherbone support")
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@ -120,6 +121,7 @@ def main():
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assert not (args.with_ethernet and args.with_etherbone)
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soc = BaseSoC(
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variant = args.variant,
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toolchain = args.toolchain,
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sys_clk_freq = int(float(args.sys_clk_freq)),
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with_ethernet = args.with_ethernet,
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