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soc/add_ethernet: Fix add_ethernet.

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This commit is contained in:
Florent Kermarrec 2022-03-21 18:03:40 +01:00
parent be23a059ff
commit 901428f5a9
1 changed files with 1 additions and 1 deletions
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2
litex/soc/integration/soc.py
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@ -1479,7 +1479,7 @@ class LiteXSoC(SoC):
"eth_rx": phy_cd + "_rx"})(ethmac)
setattr(self.submodules, name, ethmac)
# Compute Regions size and add it to the SoC.
ethmac_region_size = (ethmac.rx_slots.read() + ethmac.tx_slots.read())*ethmac.slot_size.read()
ethmac_region_size = (ethmac.rx_slots.constant + ethmac.tx_slots.constant)*ethmac.slot_size.constant
ethmac_region = SoCRegion(origin=self.mem_map.get(name, None), size=ethmac_region_size, cached=False)
self.bus.add_slave(name=name, slave=ethmac.bus, region=ethmac_region)
# Add IRQs (if enabled).