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build/gowin/common: adding missing TX/Q1 ODDR signals

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Gwenhael Goavec-Merou 2024-01-08 07:28:56 +01:00
parent 718c26d8fc
commit 91fbc79ac2
1 changed files with 4 additions and 0 deletions
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4
litex/build/gowin/common.py
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@ -7,6 +7,8 @@
from migen.fhdl.module import Module
from migen.genlib.resetsync import AsyncResetSynchronizer
from litex.gen import *
from litex.build.io import *
# Gowin AsyncResetSynchronizer ---------------------------------------------------------------------
@ -58,7 +60,9 @@ class GowinDDROutputImpl(Module):
i_CLK = clk,
i_D0 = i1,
i_D1 = i2,
i_TX = 0,
o_Q0 = o,
o_Q1 = Open(),
)
class GowinDDROutput: