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litex/soc/cores/ussysmon.py: ADC transfer function

This commit is contained in:
Vamsi Vytla 2021-03-03 10:50:58 -08:00
parent 71f7ce6a57
commit 922f85e64b
1 changed files with 1 additions and 1 deletions
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2
litex/soc/cores/ussysmon.py
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@ -103,7 +103,7 @@ class USSYSMON(Module, AutoCSR):
self.sync += [ self.sync += [
If(self.drdy, If(self.drdy,
Case(channel, dict( Case(channel, dict(
(k, v.status.eq(self.do >> 4)) (k, v.status.eq(self.do >> 6))
for k, v in channels.items())) for k, v in channels.items()))
) )
] ]