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interconnect/wishbone: Allow passing address_width (In byte addressing). 

This is useful to abstract interfaces and propagate address_width.

Idealy, Wishbone should be fully switch to byte addressing since word addressing
has been a source of common issues/errors in the past but compatibility issues
would need to be evaluated first.
This commit is contained in:
Florent Kermarrec 2022-09-12 16:12:52 +02:00
parent 91c521a22a
commit 95bed6de5c
1 changed files with 5 additions and 2 deletions
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7
litex/soc/interconnect/wishbone.py
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@ -46,9 +46,12 @@ CTI_BURST_END = 0b111
class Interface(Record): class Interface(Record):
def __init__(self, data_width=32, adr_width=30, bursting=False): def __init__(self, data_width=32, adr_width=30, bursting=False, **kwargs):
self.data_width = data_width self.data_width = data_width
self.adr_width = adr_width if kwargs.get("address_width", False):
# FIXME: Improve or switch Wishbone to byte addressing instead of word addressing.
adr_width = kwargs["address_width"] - int(log2(data_width//8))
self.adr_width = adr_width
self.bursting = bursting self.bursting = bursting
Record.__init__(self, set_layout_parameters(_layout, Record.__init__(self, set_layout_parameters(_layout,
adr_width = adr_width, adr_width = adr_width,