soc_core/serv: use UART_POLLING (no interrupt support)

2019-09-28 00:42:00 +02:00 · 2019-09-28 00:42:00 +02:00 · 9f6a2ae73e
parent a4069fc863
commit 9f6a2ae73e
1 changed files with 1 additions and 0 deletions
--- a/litex/soc/integration/soc_core.py
+++ b/litex/soc/integration/soc_core.py
@ -280,6 +280,7 @@ class SoCCore(Module):
                self.add_cpu(cpu.rocket.RocketRV64(platform, self.cpu_reset_address, self.cpu_variant))
            elif cpu_type == "serv":
                self.add_cpu(cpu.serv.SERV(platform, self.cpu_reset_address, self.cpu_variant))
+                self.add_constant("UART_POLLING", None)
            else:
                raise ValueError("Unsupported CPU type: {}".format(cpu_type))