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soc/intergration/builder: fix when no sdram

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This commit is contained in:
Florent Kermarrec 2018-09-19 23:59:42 +02:00
parent 934b08ede8
commit a3eb2e403b
1 changed files with 6 additions and 5 deletions
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11
litex/soc/integration/builder.py
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@ -101,11 +101,12 @@ class Builder:
cpu_interface.get_csr_header(csr_regions, constants))
if isinstance(self.soc, soc_sdram.SoCSDRAM):
write_to_file(
os.path.join(generated_dir, "sdram_phy.h"),
sdram_init.get_sdram_phy_c_header(
self.soc.sdram.controller.settings.phy,
self.soc.sdram.controller.settings.timing))
if hasattr(self.soc, "sdram"):
write_to_file(
os.path.join(generated_dir, "sdram_phy.h"),
sdram_init.get_sdram_phy_c_header(
self.soc.sdram.controller.settings.phy,
self.soc.sdram.controller.settings.timing))
def _generate_csr_csv(self):
memory_regions = self.soc.get_memory_regions()