update download instructions
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README
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README
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@ -7,6 +7,7 @@
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florent@enjoy-digital.fr
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A small footprint and configurable Ethernet core
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with UDP/IP hw stack and Etherbone frontend
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developed by EnjoyDigital
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[> Doc
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@ -41,13 +42,12 @@ by generating the verilog rtl that you will use as a standard core.
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- Ethernet MAC with various interfaces and various PHYs (GMII, MII, Loopback)
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- Hardware UDP/IP stack with ARP and ICMP
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[> Possibles improvements
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[> Possible improvements
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-------------------------
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- add standardized interfaces (AXI, Avalon-ST)
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- add DMA interface to MAC
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- add hardware Etherbone support
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- add RGMII/SGMII PHYs
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- ... See below Support and Consulting :)
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- ... See below Support and consulting :)
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If you want to support these features, please contact us at florent [AT]
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enjoy-digital.fr. You can also contact our partner on the public mailing list
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@ -56,26 +56,32 @@ devel [AT] lists.m-labs.hk.
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[> Getting started
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------------------
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1. Install Python3 and Xilinx's Vivado software
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1. Install Python3 and your vendor's software
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2. Obtain Migen and install it:
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(we use EnjoyDigital fork for now until new features are merged
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into upstream Migen)
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git clone https://github.com/enjoy-digital/migen
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git clone https://github.com/m-labs/migen
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cd migen
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python3 setup.py install
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cd ..
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3. Obtain LiteScope and install it:
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3. Obtain MiSoC and install it:
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git clone https://github.com/m-labs/misoc --recursive
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cd misoc
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python3 setup.py install
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cd ..
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Note: in case you have issues with Migen/MiSoC, please retry
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with our forks at:
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https://github.com/enjoy-digital/misoc
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https://github.com/enjoy-digital/migen
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until new features are merged.
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4. Obtain LiteScope and install it:
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git clone https://github.com/enjoy-digital/litescope
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cd litescope
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python3 setup.py install
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cd ..
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4. Obtain MiSoC:
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git clone https://github.com/m-labs/misoc --recursive
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XXX add setup.py to MiSoC for external use of misoclib?
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5. Obtain LiteEth
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git clone https://github.com/enjoy-digital/liteeth
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@ -83,10 +89,18 @@ into upstream Migen)
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python3 make.py all (-s UDPSoCDevel to add LiteScopeLA)
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7. Test design (only for KC705 for now):
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go to ./test directory and run:
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change com port in config.py to your com port
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try to ping 192.168.1.40
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python3 test_udp.py
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go to ./test directory:
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change com port in config.py to your com port
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run make test_udp
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8. Build and load Etherbone design (only for KC705 for now):
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python3 make.py -t Etherbone
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9. Test design (only for KC705 for now):
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try to ping 192.168.1.40
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go to ./test directory run:
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run make test_etherbone
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[> Simulations:
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Simulations are available in ./liteth/test/:
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@ -101,7 +115,9 @@ into upstream Migen)
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make simulation_name
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[> Tests :
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An UDP loopback is provided and be controlled with: /test/test_udp.py
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An UDP loopback example is provided and be controlled with: ./test/test_udp.py
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An Etherbone example with Wishbone SRAM is provided and can be controlled with:
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./test/test_etherbone.py
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[> License
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-----------
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@ -116,7 +132,7 @@ do them if possible:
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- send us bug reports when something goes wrong
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- send us the modifications and improvements you have done to LiteEth.
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[> Support and Consulting
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[> Support and consulting
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--------------------------
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We love open-source hardware and like sharing our designs with others.
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@ -3,13 +3,13 @@
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====================
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Download and install
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====================
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1. Install Python3 and Xilinx's Vivado software
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1. Install Python3 and your vendor's software
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2. Obtain Migen and install it:
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- git clone https://github.com/m-labs/migen
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- cd migen
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- python3 setup.py install
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-cd ..
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- cd ..
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3. Obtain LiteScope and install it:
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- git clone https://github.com/enjoy-digital/litescope
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@ -17,9 +17,17 @@ Download and install
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- python3 setup.py install
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- cd ..
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4. Obtain MiSoC:
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4. Obtain MiSoC and install it:
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- git clone https://github.com/m-labs/misoc --recursive
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XXX add setup.py to MiSoC for external use of misoclib?
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- cd misoc
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- python3 setup.py install
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- cd ..
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.. note::
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In case you have issues with Migen/MiSoC, please retry with our forks at:
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https://github.com/enjoy-digital/misoc
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https://github.com/enjoy-digital/migen
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until new features are merged.
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5. Obtain LiteEth
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- git clone https://github.com/enjoy-digital/liteeth
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@ -28,7 +36,15 @@ Download and install
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- python3 make.py all (-s UDPSoCDevel to add LiteScopeLA)
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7. Test design (only for KC705 for now):
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- go to ./test directory and run:
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- change com port in config.py to your com port
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- try to ping 192.168.1.40
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- python3 test_udp.py
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- go to ./test directory:
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- change com port in config.py to your com port
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- run make test_udp
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8. Build and load Etherbone design (only for KC705 for now):
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- python3 make.py -t Etherbone
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9. Test design (only for KC705 for now):
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- try to ping 192.168.1.40
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- go to ./test directory run:
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- run make test_etherbone
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@ -1,6 +1,6 @@
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<img alt="./_static/LiteEth_logo_full.png" src="_static/LiteEth_logo_full.png">
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<h3>A small footprint and configurable Ethernet core</b>.</h3>
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<h3>A small footprint and configurable Ethernet core with UDP/IP hw stack and Etherbone frontend</b>.</h3>
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<div class="container" style="width:100%;margin-bottom:10px;">
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