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soc_core: add JTAG UART support (uart_name="jtag_uart)

This commit is contained in:
Florent Kermarrec 2019-09-06 11:56:42 +02:00
parent d0ebbda4b3
commit b356204f95
1 changed files with 3 additions and 0 deletions
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3
litex/soc/integration/soc_core.py
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@ -318,6 +318,9 @@ class SoCCore(Module):
if uart_name == "jtag_atlantic": if uart_name == "jtag_atlantic":
from litex.soc.cores.jtag import JTAGAtlantic from litex.soc.cores.jtag import JTAGAtlantic
self.submodules.uart_phy = JTAGAtlantic() self.submodules.uart_phy = JTAGAtlantic()
elif uart_name == "jtag_uart":
from litex.soc.cores.jtag import JTAGPHY
self.submodules.uart_phy = JTAGPHY(device=platform.device)
else: else:
self.submodules.uart_phy = uart.UARTPHY(platform.request(uart_name), clk_freq, uart_baudrate) self.submodules.uart_phy = uart.UARTPHY(platform.request(uart_name), clk_freq, uart_baudrate)
self.submodules.uart = ResetInserter()(uart.UART(self.uart_phy)) self.submodules.uart = ResetInserter()(uart.UART(self.uart_phy))