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build/xilinx: minor cleanup

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This commit is contained in:
Sebastien Bourdeauducq 2015-09-12 16:39:39 +08:00
parent 047d1f48b5
commit b43495aab1
2 changed files with 2 additions and 3 deletions
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3
migen/build/xilinx/ise.py
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@ -4,7 +4,6 @@ import sys
from migen.fhdl.std import * from migen.fhdl.std import *
from migen.fhdl.structure import _Fragment from migen.fhdl.structure import _Fragment
from migen.build.generic_platform import * from migen.build.generic_platform import *
from migen.build import tools from migen.build import tools
from migen.build.xilinx import common from migen.build.xilinx import common
@ -134,7 +133,7 @@ def _default_ise_path():
def _default_source(): def _default_source():
return False if sys.platform == "win32" else True return sys.platform != "win32"
class XilinxISEToolchain: class XilinxISEToolchain:

2
migen/build/xilinx/platform.py
View file

@ -17,7 +17,7 @@ class XilinxPlatform(GenericPlatform):
def get_verilog(self, *args, special_overrides=dict(), **kwargs): def get_verilog(self, *args, special_overrides=dict(), **kwargs):
so = dict(common.xilinx_special_overrides) so = dict(common.xilinx_special_overrides)
if self.device[:3] == "xc7": if self.device[:3] == "xc7":
so.update(dict(common.xilinx_s7_special_overrides)) so.update(common.xilinx_s7_special_overrides)
so.update(special_overrides) so.update(special_overrides)
return GenericPlatform.get_verilog(self, *args, special_overrides=so, **kwargs) return GenericPlatform.get_verilog(self, *args, special_overrides=so, **kwargs)