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cpu/microwatt: update microwatt_wraper.vhdl

This commit is contained in:
Florent Kermarrec 2020-05-18 16:38:08 +02:00
parent be25500e91
commit b5352f403c
1 changed files with 9 additions and 0 deletions
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9
litex/soc/cores/cpu/microwatt/microwatt_wrapper.vhdl
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@ -59,6 +59,8 @@ architecture rtl of microwatt_wrapper is
signal wishbone_data_in : wishbone_slave_out; signal wishbone_data_in : wishbone_slave_out;
signal wishbone_data_out : wishbone_master_out; signal wishbone_data_out : wishbone_master_out;
signal xics_in : XicsToExecute1Type;
begin begin
-- wishbone_insn mapping -- wishbone_insn mapping
@ -85,6 +87,9 @@ begin
wishbone_data_sel <= wishbone_data_out.sel; wishbone_data_sel <= wishbone_data_out.sel;
wishbone_data_we <= wishbone_data_out.we; wishbone_data_we <= wishbone_data_out.we;
-- xics_in mapping
xics_in.irq <= '0';
microwatt_core : entity work.core microwatt_core : entity work.core
generic map ( generic map (
SIM => SIM, SIM => SIM,
@ -94,6 +99,8 @@ begin
clk => clk, clk => clk,
rst => rst, rst => rst,
alt_reset => '0',
wishbone_insn_in => wishbone_insn_in, wishbone_insn_in => wishbone_insn_in,
wishbone_insn_out => wishbone_insn_out, wishbone_insn_out => wishbone_insn_out,
@ -107,6 +114,8 @@ begin
dmi_wr => dmi_wr, dmi_wr => dmi_wr,
dmi_ack => dmi_ack, dmi_ack => dmi_ack,
xics_in => xics_in,
terminated_out => terminated_out terminated_out => terminated_out
); );