Convert -> convert
This commit is contained in:
parent
3b640c45bb
commit
b60abfaa4a
2
build.py
2
build.py
|
@ -31,7 +31,7 @@ def str2file(filename, contents):
|
|||
str2file("soc.v", src_verilog)
|
||||
str2file("soc.ucf", src_ucf)
|
||||
verilog_sources.append("build/soc.v")
|
||||
|
||||
#raise SystemExit
|
||||
# xst
|
||||
xst_prj = ""
|
||||
for s in verilog_sources:
|
||||
|
|
|
@ -14,7 +14,7 @@ class Inst:
|
|||
self.tx = Signal(reset=1)
|
||||
self.rx = Signal()
|
||||
|
||||
self.divisor = int(clk_freq/baud/16); # TODO
|
||||
self.divisor = int(clk_freq/baud/16) # TODO
|
||||
|
||||
def get_fragment(self):
|
||||
enable16 = Signal()
|
||||
|
|
|
@ -5,6 +5,6 @@ from milkymist import norflash
|
|||
|
||||
norflash0 = norflash.Inst(25, 12)
|
||||
frag = norflash0.get_fragment()
|
||||
v = verilog.Convert(frag, name="norflash",
|
||||
v = verilog.convert(frag, name="norflash",
|
||||
ios={norflash0.bus.cyc_i, norflash0.bus.stb_i, norflash0.bus.we_i, norflash0.bus.adr_i, norflash0.bus.sel_i, norflash0.bus.dat_i, norflash0.bus.dat_o, norflash0.bus.ack_o})
|
||||
print(v)
|
||||
|
|
Loading…
Reference in New Issue