verilog: use blocking assignment in combinatorial process
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@ -44,32 +44,32 @@ def _printexpr(ns, node):
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else:
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raise TypeError
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def _printnode(ns, level, comb, node):
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def _printnode(ns, level, node):
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if isinstance(node, Assign):
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if comb or IsVariable(node.l):
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if IsVariable(node.l):
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assignment = " = "
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else:
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assignment = " <= "
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return "\t"*level + _printexpr(ns, node.l) + assignment + _printexpr(ns, node.r) + ";\n"
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elif isinstance(node, StatementList):
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return "".join(list(map(partial(_printnode, ns, level, comb), node.l)))
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return "".join(list(map(partial(_printnode, ns, level), node.l)))
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elif isinstance(node, If):
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r = "\t"*level + "if (" + _printexpr(ns, node.cond) + ") begin\n"
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r += _printnode(ns, level + 1, comb, node.t)
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r += _printnode(ns, level + 1, node.t)
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if node.f.l:
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r += "\t"*level + "end else begin\n"
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r += _printnode(ns, level + 1, comb, node.f)
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r += _printnode(ns, level + 1, node.f)
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r += "\t"*level + "end\n"
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return r
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elif isinstance(node, Case):
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r = "\t"*level + "case (" + _printexpr(ns, node.test) + ")\n"
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for case in node.cases:
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r += "\t"*(level + 1) + _printexpr(ns, case[0]) + ": begin\n"
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r += _printnode(ns, level + 2, comb, case[1])
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r += _printnode(ns, level + 2, case[1])
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r += "\t"*(level + 1) + "end\n"
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if node.default.l:
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r += "\t"*(level + 1) + "default: begin\n"
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r += _printnode(ns, level + 2, comb, node.default)
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r += _printnode(ns, level + 2, node.default)
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r += "\t"*(level + 1) + "end\n"
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r += "\t"*level + "endcase\n"
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return r
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@ -148,11 +148,11 @@ def Convert(f, ios=set(), name="top", clkname="sys_clk", rstname="sys_rst", ns=N
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if f.comb.l:
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r += "always @(*) begin\n"
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r += _printnode(ns, 1, True, f.comb)
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r += _printnode(ns, 1, f.comb)
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r += "end\n\n"
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if f.sync.l:
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r += "always @(posedge " + ns.GetName(clks) + ") begin\n"
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r += _printnode(ns, 1, False, InsertReset(rsts, f.sync))
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r += _printnode(ns, 1, InsertReset(rsts, f.sync))
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r += "end\n\n"
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r += _printinstances(ns, f.instances, clks, rsts)
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