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soc: add memory.name_override to name when adding csrbankarray.srams to csr_regions

This commit is contained in:
Florent Kermarrec 2015-04-03 12:45:32 +02:00
parent 85b3cced22
commit c9c11e7aa8
1 changed files with 1 additions and 1 deletions
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2
misoclib/soc/__init__.py
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@ -179,7 +179,7 @@ class SoC(Module):
for name, csrs, mapaddr, rmap in self.csrbankarray.banks: for name, csrs, mapaddr, rmap in self.csrbankarray.banks:
self.add_csr_region(name, self.mem_map["csr"]+0x80000000+0x800*mapaddr, self.csr_data_width, csrs) self.add_csr_region(name, self.mem_map["csr"]+0x80000000+0x800*mapaddr, self.csr_data_width, csrs)
for name, memory, mapaddr, mmap in self.csrbankarray.srams: for name, memory, mapaddr, mmap in self.csrbankarray.srams:
self.add_csr_region(name, self.mem_map["csr"]+0x80000000+0x800*mapaddr, self.csr_data_width, memory) self.add_csr_region(name + "_" + memory.name_override, self.mem_map["csr"]+0x80000000+0x800*mapaddr, self.csr_data_width, memory)
# Interrupts # Interrupts
if hasattr(self.cpu_or_bridge, "interrupt"): if hasattr(self.cpu_or_bridge, "interrupt"):