integration/builder: Switch to SoC.init_rom directly and remove initialize_rom that is no longer used.
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@ -331,7 +331,7 @@ class Builder:
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# Initialize SoC with with BIOS data.
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# Initialize SoC with with BIOS data.
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self.soc.initialize_rom(bios_data)
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self.soc.init_rom(name="rom", contents=bios_data)
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def build(self, **kwargs):
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def build(self, **kwargs):
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# Pass Output Directory to Platform.
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# Pass Output Directory to Platform.
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@ -271,9 +271,6 @@ class SoCCore(LiteXSoC):
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def add_csr(self, csr_name, csr_id=None, use_loc_if_exists=False):
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def add_csr(self, csr_name, csr_id=None, use_loc_if_exists=False):
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self.csr.add(csr_name, csr_id, use_loc_if_exists=use_loc_if_exists)
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self.csr.add(csr_name, csr_id, use_loc_if_exists=use_loc_if_exists)
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def initialize_rom(self, data):
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self.init_rom(name="rom", contents=data)
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def add_memory_region(self, name, origin, length, type="cached"):
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def add_memory_region(self, name, origin, length, type="cached"):
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self.bus.add_region(name, SoCRegion(origin=origin, size=length,
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self.bus.add_region(name, SoCRegion(origin=origin, size=length,
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cached="cached" in type,
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cached="cached" in type,
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